160 lines
5.3 KiB
Diff
160 lines
5.3 KiB
Diff
From: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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Date: Wed, 23 Mar 2016 12:52:31 +0000
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Subject: ar71xx: Add QCA955X GPIO mux and function definitions
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Signed-off-by: Sven Eckelmann <sven.eckelmann@open-mesh.com>
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Backport of r49075
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Forwarded: https://patchwork.ozlabs.org/patch/624184/
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diff --git a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
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index 797977f..0126f6a 100644
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--- a/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
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+++ b/target/linux/ar71xx/patches-3.18/601-MIPS-ath79-add-more-register-defines.patch
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@@ -194,7 +194,7 @@
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#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
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#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
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-@@ -529,6 +626,12 @@
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+@@ -529,8 +626,22 @@
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#define AR71XX_GPIO_REG_INT_ENABLE 0x24
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#define AR71XX_GPIO_REG_FUNC 0x28
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@@ -206,8 +206,18 @@
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+#define AR934X_GPIO_REG_OUT_FUNC5 0x40
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#define AR934X_GPIO_REG_FUNC 0x6c
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++#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c
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++#define QCA955X_GPIO_REG_OUT_FUNC1 0x30
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++#define QCA955X_GPIO_REG_OUT_FUNC2 0x34
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++#define QCA955X_GPIO_REG_OUT_FUNC3 0x38
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++#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c
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++#define QCA955X_GPIO_REG_OUT_FUNC5 0x40
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++#define QCA955X_GPIO_REG_FUNC 0x6c
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++
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#define AR71XX_GPIO_COUNT 16
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-@@ -560,4 +663,170 @@
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+ #define AR7240_GPIO_COUNT 18
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+ #define AR7241_GPIO_COUNT 20
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+@@ -560,4 +671,235 @@
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#define AR934X_SRIF_DPLL2_OUTDIV_SHIFT 13
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#define AR934X_SRIF_DPLL2_OUTDIV_MASK 0x7
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@@ -288,6 +298,71 @@
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+#define AR934X_GPIO_OUT_EXT_LNA0 46
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+#define AR934X_GPIO_OUT_EXT_LNA1 47
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+
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++#define QCA955X_GPIO_FUNC_CLK_OBS7_EN BIT(9)
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++#define QCA955X_GPIO_FUNC_CLK_OBS6_EN BIT(8)
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++#define QCA955X_GPIO_FUNC_CLK_OBS5_EN BIT(7)
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++#define QCA955X_GPIO_FUNC_CLK_OBS4_EN BIT(6)
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++#define QCA955X_GPIO_FUNC_CLK_OBS3_EN BIT(5)
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++#define QCA955X_GPIO_FUNC_CLK_OBS2_EN BIT(4)
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++#define QCA955X_GPIO_FUNC_CLK_OBS1_EN BIT(3)
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++#define QCA955X_GPIO_FUNC_JTAG_DISABLE BIT(1)
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++
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++#define QCA955X_GPIO_OUT_GPIO 0
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++#define QCA955X_MII_EXT_MDI 1
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++#define QCA955X_SLIC_DATA_OUT 3
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++#define QCA955X_SLIC_PCM_FS 4
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++#define QCA955X_SLIC_PCM_CLK 5
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++#define QCA955X_SPI_CLK 8
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++#define QCA955X_SPI_CS_0 9
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++#define QCA955X_SPI_CS_1 10
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++#define QCA955X_SPI_CS_2 11
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++#define QCA955X_SPI_MISO 12
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++#define QCA955X_I2S_CLK 13
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++#define QCA955X_I2S_WS 14
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++#define QCA955X_I2S_SD 15
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++#define QCA955X_I2S_MCK 16
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++#define QCA955X_SPDIF_OUT 17
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++#define QCA955X_UART1_TD 18
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++#define QCA955X_UART1_RTS 19
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++#define QCA955X_UART1_RD 20
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++#define QCA955X_UART1_CTS 21
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++#define QCA955X_UART0_SOUT 22
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++#define QCA955X_SPDIF2_OUT 23
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++#define QCA955X_LED_SGMII_SPEED0 24
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++#define QCA955X_LED_SGMII_SPEED1 25
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++#define QCA955X_LED_SGMII_DUPLEX 26
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++#define QCA955X_LED_SGMII_LINK_UP 27
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++#define QCA955X_SGMII_SPEED0_INVERT 28
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++#define QCA955X_SGMII_SPEED1_INVERT 29
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++#define QCA955X_SGMII_DUPLEX_INVERT 30
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++#define QCA955X_SGMII_LINK_UP_INVERT 31
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++#define QCA955X_GE1_MII_MDO 32
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++#define QCA955X_GE1_MII_MDC 33
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++#define QCA955X_SWCOM2 38
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++#define QCA955X_SWCOM3 39
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++#define QCA955X_MAC2_GPIO 40
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++#define QCA955X_MAC3_GPIO 41
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++#define QCA955X_ATT_LED 42
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++#define QCA955X_PWR_LED 43
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++#define QCA955X_TX_FRAME 44
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++#define QCA955X_RX_CLEAR_EXTERNAL 45
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++#define QCA955X_LED_NETWORK_EN 46
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++#define QCA955X_LED_POWER_EN 47
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++#define QCA955X_WMAC_GLUE_WOW 68
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++#define QCA955X_RX_CLEAR_EXTENSION 70
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++#define QCA955X_CP_NAND_CS1 73
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++#define QCA955X_USB_SUSPEND 74
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++#define QCA955X_ETH_TX_ERR 75
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++#define QCA955X_DDR_DQ_OE 76
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++#define QCA955X_CLKREQ_N_EP 77
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++#define QCA955X_CLKREQ_N_RC 78
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++#define QCA955X_CLK_OBS0 79
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++#define QCA955X_CLK_OBS1 80
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++#define QCA955X_CLK_OBS2 81
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++#define QCA955X_CLK_OBS3 82
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++#define QCA955X_CLK_OBS4 83
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++#define QCA955X_CLK_OBS5 84
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++
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+/*
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+ * MII_CTRL block
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+ */
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diff --git a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
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index 0e87357..8a54859 100644
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--- a/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
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+++ b/target/linux/ar71xx/patches-3.18/739-MIPS-ath79-add-gpio-func-register-for-QCA955x-SoC.patch
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@@ -37,37 +37,12 @@
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+ }
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- if (gpio >= AR934X_GPIO_COUNT)
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+- return;
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+ if (gpio >= gpio_count)
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- return;
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++ return;
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- reg = AR934X_GPIO_REG_OUT_FUNC0 + 4 * (gpio / 4);
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+ reg = reg_base + 4 * (gpio / 4);
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s = 8 * (gpio % 4);
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spin_lock_irqsave(&ath79_gpio_lock, flags);
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---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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-+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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-@@ -875,6 +875,14 @@
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- #define QCA953X_GPIO_OUT_MUX_LED_LINK4 44
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- #define QCA953X_GPIO_OUT_MUX_LED_LINK5 45
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-
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-+#define QCA955X_GPIO_REG_OUT_FUNC0 0x2c
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-+#define QCA955X_GPIO_REG_OUT_FUNC1 0x30
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-+#define QCA955X_GPIO_REG_OUT_FUNC2 0x34
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-+#define QCA955X_GPIO_REG_OUT_FUNC3 0x38
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-+#define QCA955X_GPIO_REG_OUT_FUNC4 0x3c
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-+#define QCA955X_GPIO_REG_OUT_FUNC5 0x40
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-+#define QCA955X_GPIO_REG_FUNC 0x6c
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-+
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- #define QCA956X_GPIO_REG_OUT_FUNC0 0x2c
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- #define QCA956X_GPIO_REG_OUT_FUNC1 0x30
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- #define QCA956X_GPIO_REG_OUT_FUNC2 0x34
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-@@ -1014,6 +1022,8 @@
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- #define AR934X_GPIO_OUT_EXT_LNA0 46
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- #define AR934X_GPIO_OUT_EXT_LNA1 47
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-
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-+#define QCA955X_GPIO_OUT_GPIO 0
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-+
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- /*
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- * MII_CTRL block
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- */
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